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hytham
Pooh-Bah

Reged: 12/25/12

QE, RMS, Full Well Capacity, LDR ... CCD Tech Qs
#5761716 - 03/28/13 03:19 AM

Hey everyone.

Like many others that have come on by, I'm in the market to purchase myself a kick a** (well to me it will be) CCD camera that will serve me for the foreseeable future. Of course I have done extensive reading surrounding this topic to gain a deeper understanding of all of the acronyms involved and how they will ultimately affect one's final result(s).

I'll use two chips that seem to be of hot debate lately; ICX694 and the KAF-8300. These do not reflect what I'm currently looking into, but admittedly the Apogee A694 is very tempting.

I have statements that I would like corrected if necessary with follow up questions:

1) Full Well Capacity: This defines the amount of electrons that can be held per pixel and is determined by the surface area of a given pixel. In a perfect world scenario every photon that strikes a pixel would be converted into an electron maximizing the SNR, but variety forms of noise ultimately affect the SNR. ICX694 4.54m: 20K. KAF-8300 5.4m: 25.5K.

2) RMS (root mean square): This defines the TOTAL system noise that is generated per pixel in a CCD including but not limited to: read (on and off chip), dark current, shot noise ... etc. ICX694 (5e- RMS) and the KAF-8300 (16e- RMS).

3) Dynamic Range: Dynamic range is based on Full Well Capacity divided by RMS. ICX694: 20K/5 = 4000:1. KAF-8300 25.5K/16 = 1594:1

4) Quantum Efficiency: Defines the sensitivity of the electrical components to photons. The energy that a photon carries is inversely proportional to its wavelength and that's why we see manufacturers provide QE ratings across different wavelengths. ICX694: 77% @580nm. KAF-8300: 60% @540nm

5) Dark Current: This noise is derived thermally and can be managed through subtraction from our images by using dark frames through acquisition. ICX694: .002e- p/s @ -10C. KAF-8300 .02e- p/s @ -15C.

Here is where I get confused.

1) Do QE and full well capacity have any relationship that affect total number of electrons collected in the same way that RMS and full well capacity affect the linear dynamic range of the CCD?

2) Looking at the data sheets of both the ICX694 and the KAF-8300 they have a dynamic range of 64db, but using my calculation above in (3), how does that even compute? 4000:1 = 64db & 1594:1 = 64db ??

3) Is a higher full well capacity that much better? I can understand that a significantly higher full well capacity of 40K with an RMS of 6e- creates a very high dynamic range, but when comparing 20K with an RMS of 5e- to 25.5K with an RMS of 16e-, does it account for that much more signal to make that much of a difference? I guess this ties to my 2nd question.

4) How is temperature factored in? I've seen statements made that for every 5C dark current is doubled? Is this correct?

Thank you for the help.

-Hytham

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Lightning
sage

Reged: 07/04/10

Loc: Canberra, Australia
Re: QE, RMS, Full Well Capacity, LDR ... CCD Tech Qs [Re: hytham]
#5761760 - 03/28/13 05:53 AM

1) Full Well Capacity is OFTEN PROPORTIONAL to the surface area of a pixel, but is not defined by it. Is a larger bucket defined by the size of the opening in the top? No, and neither is a pixel, which is effectively a bucket.

2) Root Mean Square is a way of calculating the average for a fluctuating signal (you take the square root of the average of all values-squared). Total noise = total noise. Read noise = read noise.

4) The QE of a sensor across multiple wavelengths depends on the structure and material of the sensor. A thin sensor will not do a good job of absorbing longer-wavelength photons and vice-versa. A gallium-arsenide sensor works extremely well at near-IR wavelengths. That's why you see QE ratings across a spectrum of wavelengths (the transparency of a lens or the reflectivity of a mirror is also wavelength dependent for similar reasons).

1) No. A high QE will allow for efficient (faster) collection of light at the specified wavelength. A larger full-well capacity will allow for greater dynamic range. These are two very different things.

2) 4000:1 is likely the specified 12-bit ADC (Analog to Digital Conversion). These are the number of grey-scales reported by the camera, even if the camera were not able to accurate decide which value to place the result into. The actual dynamic range is 1594:1.

3) No, on it's own having a high full-well capacity is not any better - in the extreme example you gave the 25.5K with read noise of 16e- will suck compared to the 20K with read noise of 4e-.

4) That's a rough guideline but it's likely true-enough for most silicon detectors. Certainly my dSLR is not worth using at 30'C. Even a 10-second exposure produces little other than noise.

Hope this helps,
Cam

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hytham
Pooh-Bah

Reged: 12/25/12

Re: QE, RMS, Full Well Capacity, LDR ... CCD Tech Qs [Re: Lightning]
#5765452 - 03/29/13 06:08 PM

I truly appreciate the feedback and sets me off in the right direction. The problem now is deciding what CCD would best fit the set up I currently have and the set up I plan on purchasing.

I have a question regarding full well capacity. You state that it is often proportional to pixel size. Is this based on the manufacturers design of the CCD chip? I had always assumed that chip size goes beyond diagonal measurement, but you seem to infer that depth does vary. Is this true?

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Jared
Postmaster

Reged: 10/11/05

Loc: Piedmont, California, U.S.
Re: QE, RMS, Full Well Capacity, LDR ... CCD Tech Qs [Re: hytham]
#5769867 - 03/31/13 11:00 PM

Full well capacity does vary with technology, not just pixel size. For example, an 16803 based camera will have a full well capacity of around 100,000 e- whereas an 8300 based camera is more like 25,000 e-. The former has 81 square micron pixels whereas the latter has 29 square micron pixels. If the full well capacity were determined purely by pixel size, the 16803 based cameras should have 2.8x the capacity of the 8300 based cameras. Instead the ratio is 4x. Both technology and pixel size matter.

Note that chip size--diagonal measurement--plays no role that I am aware of. Full well has to do with how many electrons each individual pixel can hold, not how many the entire chip can hold.

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