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IMX342 CMOS v 16200 CCD

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#1 natwin

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Posted 05 December 2018 - 07:53 PM

Sony has release a new APS-C mono cmos sensor, the IMX342, a 31mp sensor with a 3.45um pixel pitch. QHY is currently testing the sensor for a new mono cmos camera. Coming from a Canon 5D2 perspective, the idea of a "largish" mono cmos sensor seems appealing, particularly with the low read noise usually found on Sony sensors. I have also been interested in cameras using the slightly larger 16200 ccd chip, but have been warned away by people saying the 10e- read noise would be problematic in an orange light pollution zone. The Sony sensor, while all the specs are not yet published, is likely to have a read noise of around 3e-. Anyone care to enlighten me on the comparative advantages and disadvantages of cmos versus ccd mono sensors, particularly when being used in a light polluted zone?



#2 bobzeq25

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Posted 05 December 2018 - 08:21 PM

Typically (can't say it would apply in this case),  CCDs have "cleaner" data, CMOS is subject to things like amp glow.  But that can be calibrated out, albeit not absolutely perfectly.  CMOS is typically much cheaper.  The much cheaper thing, with few if any serious drawbacks, is proving to be a big hurdle for CCDs to overcome.  Large chips was one of their remaining refuges.

 

The low read noise of the CMOS permits much shorter subexposures.  That can be valuable, although total imaging time is the big deal in light polluted skies.  If anything CCDs might have an advanrtage, the sheer number of exposures for CMOS, with the same total imaging time, can be a practical issue.  Which can be solved by more computer power.


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#3 ccs_hello

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Posted 05 December 2018 - 08:24 PM

Interesting to note it's a global shutter image sensor packed with IMO too many pixels to my taste.

In astro (other than lucky imaging), it's probably not too much useful.

BTW, it's a nice image sensor for 4K video applications.

 

Oh sure, monochrome image sensor is a welcome change of heart from SONY Semiconductor point of view (never a large enough market for them to get into.)


Edited by ccs_hello, 05 December 2018 - 08:26 PM.


#4 andysea

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Posted 05 December 2018 - 09:01 PM

It's difficult to compare the two sensors as they are radically different. Besides the different architecture, they have  very different pixel sizes. I would say that the IMX342 would work well with shorter focal length instruments. 

So I think it also depends on what telescope the camera is going to be paired with.


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#5 chadrian84

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Posted 05 December 2018 - 10:53 PM

For me the big question with the IMX342 is binning performance.  Apparently it will provide true binning ability.  At 2x2 it will have a 6.9um pixel size and be 8 megapixels.  This puts my Edge11 + .7x reducer at .73" per pixel -- almost exactly where I'd like to be.  The APS-C sensor size should be about perfect to prevent vignetting and distorted stars in corners. 

 

The native 16200 gives a similar image scale but the sensor is much larger.


Edited by chadrian84, 05 December 2018 - 10:59 PM.


#6 andysea

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Posted 05 December 2018 - 11:07 PM

That's right, now I remember the binning ability, thanks for pointing that out! True hardware binning is a big deal. I wonder if that reduces the read noise too.



#7 ccs_hello

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Posted 05 December 2018 - 11:46 PM

The mono version of the IMX342 indeed showing that IMX342LLA has

2 x 2 vertical FD binning mode

 

(FD: floating diffusion, the charge storage capacitor)

 

It indeed is charge-domain binning which rarely happens in CMOS image sensors.


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#8 natwin

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Posted 06 December 2018 - 03:21 AM

Typically (can't say it would apply in this case),  CCDs have "cleaner" data, CMOS is subject to things like amp glow.  But that can be calibrated out, albeit not absolutely perfectly.  CMOS is typically much cheaper.  The much cheaper thing, with few if any serious drawbacks, is proving to be a big hurdle for CCDs to overcome.  Large chips was one of their remaining refuges.

 

The low read noise of the CMOS permits much shorter subexposures.  That can be valuable, although total imaging time is the big deal in light polluted skies.  If anything CCDs might have an advanrtage, the sheer number of exposures for CMOS, with the same total imaging time, can be a practical issue.  Which can be solved by more computer power.

I have read that CMOS cameras tend to have more amp glow, though I've seen amp glow or something similar in CCD data as well. I've also read that aside from amp glow and calibration, the microlenses can be problematic. Any input on this topic?

 

While the practical implications of generating more data through shorter exposures is clear, the low read noise only allows for shorter exposures but, I'm assuming, doesn't require it. The way I understand it, the longest useful exposure is related to the full well capacity. So CCD or CMOS sensors with similar full well capacities should allow for similar exposure lengths. It would seem that CMOS allows for either short or long exposures. Or is the length of exposure with CMOS limited by amp glow?

 

 

The mono version of the IMX342 indeed showing that IMX342LLA has

2 x 2 vertical FD binning mode

 

(FD: floating diffusion, the charge storage capacitor)

 

It indeed is charge-domain binning which rarely happens in CMOS image sensors.

FD binning and charge-domain binning? New terms to me. Anyone care to explain?

 

Also, aside from changing the imaging scale, does binning increase the SNR by virtue of the increased surface area? Does it increase the dynamic range by either lowering read noise, raising the full well capacity, or both?

 

Lots of questions. I appreciate everyone's insights.



#9 bobzeq25

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Posted 06 December 2018 - 12:33 PM

I have read that CMOS cameras tend to have more amp glow, though I've seen amp glow or something similar in CCD data as well. I've also read that aside from amp glow and calibration, the microlenses can be problematic. Any input on this topic?

 

While the practical implications of generating more data through shorter exposures is clear, the low read noise only allows for shorter exposures but, I'm assuming, doesn't require it. The way I understand it, the longest useful exposure is related to the full well capacity. So CCD or CMOS sensors with similar full well capacities should allow for similar exposure lengths. It would seem that CMOS allows for either short or long exposures. Or is the length of exposure with CMOS limited by amp glow?

 

 

FD binning and charge-domain binning? New terms to me. Anyone care to explain?

 

Also, aside from changing the imaging scale, does binning increase the SNR by virtue of the increased surface area? Does it increase the dynamic range by either lowering read noise, raising the full well capacity, or both?

 

Lots of questions. I appreciate everyone's insights.

Binning does indeed increase snr and raise the full well capacity.  It's essentially like having bigger pixels.  (not quite, but close enough).

 

Typically a CCD can read all 4 pixels at once, so divides the read noise by 4.  That's been an advantage for the CCD, the CMOS reads each pixel individually.  But the low read noise of the CMOS compensates.  And this CMOS may also lower the read noise when binning, which may be what the funny terms are trying to say.

 

The microlens thing affects some CMOS more than others.  It's seen on bright stars.  Many find it no problem, some refuse to get a camera with it.  It's part of why I said CCD data is generally "cleaner".

 

Using short exposures with CMOS is not necessary, but, if read noise is low, why throw away dynamic range with long exposures?


Edited by bobzeq25, 06 December 2018 - 12:37 PM.


#10 natwin

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Posted 06 December 2018 - 06:07 PM

Thanks for those explanations. One question and one thought:

 

Can you point me to an example photo that shows the effects of microlensing?

 

And with regard to dynamic range, my assumption is that you gain dynamic range up to the point of full well saturation. I've always been of the mind that for the best SNR, you expose to near the full well capacity. This would be the case with both CMOS and CCD.



#11 bobzeq25

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Posted 06 December 2018 - 06:30 PM

Thanks for those explanations. One question and one thought:

 

Can you point me to an example photo that shows the effects of microlensing?

 

And with regard to dynamic range, my assumption is that you gain dynamic range up to the point of full well saturation. I've always been of the mind that for the best SNR, you expose to near the full well capacity. This would be the case with both CMOS and CCD.

There are a number of threads, with examples.  Just a couple.

 

https://www.cloudyni...rs#entry8950615

 

https://www.cloudyni...rs#entry8341881

 

The thing about "exposing to the point of "fwc".  AP always has a large dynamic range.  It's rare when you have an image with no saturated stars.  And saturated stars inevitably lose color.  So, you dial exposure back a bit, often, to reduce that particular issue.  Globular clusters are a great example.


Edited by bobzeq25, 06 December 2018 - 06:30 PM.


#12 Jon Rista

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Posted 06 December 2018 - 07:13 PM


FD binning and charge-domain binning? New terms to me. Anyone care to explain?

 

Also, aside from changing the imaging scale, does binning increase the SNR by virtue of the increased surface area? Does it increase the dynamic range by either lowering read noise, raising the full well capacity, or both?

 

Lots of questions. I appreciate everyone's insights.

Charge binning is when the signal from several pixels, in it's original and most basic form of a collection of electrons held in a charge potential well (the pixel), is combined before anything else is done to that signal. For a signal to be converted from charge, into a digital format we can process on a computer, it must be converted a couple of times. These conversions introduce noise, and other processes of moving the signal out of the pixel, amplifying it, and converting it again to digital, introduce more noise.

 

Most binning that occurs with CCD sensors is charge binning, the combination of collections of electrons. Most "binning" that occurs with most CMOS sensors these days is done digitally, after the analog signal is converted to digital...we just sum or average the numbers, but then we don't get any benefit on the read noise front.

 

So, FD binning in a CMOS sensor would bin, combine charge from multiple pixels, at the earliest possible convenience...in the pixels, while the charge is still charge. The charge in the FD is then converted to a voltage (very small amount of noise introduced here), which is applied to an amplifier (small to moderate amount of noise added here, amplified along with the charge signal), and the amplified voltage is then applied to the ADC unit (moderate to high amount of read noise added here), which converts the voltage into a digital number (which introduces quantization error, also a form of noise). Since the charge is combined as early as possible, you only get one "hit" of read noise added to the whole combined charge of all four pixels...rather than one "hit" per pixel (which is what happens when digitally "binning").

 

VtPS5Po.gif

 

If you usually have say 3.5e- read noise added each time a pixel is read out. Digital binning would have SQRT(4*3.5^2) or 7e- read noise total in a pixel digitally "binned" 2x2. Charge binning, on the other hand, would just have 3.5e- read noise. Now, with read levels this low (or even much lower), the difference to SNR is not that great. Not as great as, say, if you had 8, 10, 15e- or more read noise (which some CCD cameras have). So the benefit of charge binning is not necessarily going to be as great with 2x2 FD binning in CMOS as it potentially can be with CCD. That said, if you are chasing faint signals, especially under dark skies, FD charge binning would be a bonus, and would help in scraping really faint signals out of the noise,


Edited by Jon Rista, 06 December 2018 - 07:16 PM.

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#13 ccs_hello

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Posted 06 December 2018 - 07:46 PM

Also would like to point out IMX342's column-parallel A/D converters are just 12-bit (not the early leaked info about it's 14-bit.)

 

BTW, with 31 Mpixel spatial resolution and high frame rate (tuned for 4K video), it's understandable that SONY chose to use 12-bit.



#14 natwin

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Posted 07 December 2018 - 11:06 AM

So the benefit of charge binning is not necessarily going to be as great with 2x2 FD binning in CMOS as it potentially can be with CCD. That said, if you are chasing faint signals, especially under dark skies, FD charge binning would be a bonus, and would help in scraping really faint signals out of the noise,

 

Thanks for the detailed explanation on binning, Jon. The take away, I assume, is that while hardware binning has a small advantage for CMOS, the already low read noise floor makes it far less necessary than for CCD cameras. So perhaps binning in the CMOS case would be most helpful for matching pixel scale to a wider variety of focal lengths?

 

One more tangential question: In a much earlier post of yours, I read your recommendation that low read noise CMOS cameras are better suited to light polluted areas, whereas higher read noise CCD cameras are the purview of dark skies. Can't remember the reason. If you have a minute, care to reiterate?

 

 

Also would like to point out IMX342's column-parallel A/D converters are just 12-bit (not the early leaked info about it's 14-bit.)

 

BTW, with 31 Mpixel spatial resolution and high frame rate (tuned for 4K video), it's understandable that SONY chose to use 12-bit.

 

Based on the pixel pitch of the IMX342 and Sony's recent sensor performance, I assume the full well will be around 22K and the read noise about 3e-. This translates to about 12.5 stops of dynamic range, for which a 12 bit ADC slightly under performs. In practice, when stacking multiple images, would the slightly under powered ADC make a noticeable difference? Would it perhaps require more frames in the stack to get the same SNR as would be the case with a 14 bit ADC?



#15 ccs_hello

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Posted 07 December 2018 - 09:54 PM

...

Based on the pixel pitch of the IMX342 and Sony's recent sensor performance, I assume the full well will be around 22K and the read noise about 3e-. This translates to about 12.5 stops of dynamic range, for which a 12 bit ADC slightly under performs. In practice, when stacking multiple images, would the slightly under powered ADC make a noticeable difference? Would it perhaps require more frames in the stack to get the same SNR as would be the case with a 14 bit ADC?

One is getting the better 14-bit resolution in native way and the other, multi-exposure then stacking.

Key is (most of) SONY Exmor designed for DSLR/mirrorless are capable doing 14-bit but not this one.



#16 james7ca

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Posted 08 December 2018 - 01:33 AM

It should also be noted that a global shutter MAY introduce more pattern noise. At least that was the case with the Sony IMX174 and Sam at ZWO said that the global shutter is what caused the high pattern noise on the IMX174. Of course, that may not happen in this latest sensor from Sony (the IMX342) and in any case global shutters in general MAY NOT lead to higher pattern noise. Something to watch out for, however, on the IMX342.



#17 Stevan Klaas

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Posted 08 December 2018 - 01:38 AM

Hi Jon,

 

What would be the effect on the full well of such a charge binning in the IMX342 ?

 

The CMOS have very shallow wells at higher gains, leading to shorter exposure, and consequently using a lot of disk space and processing power to treat the image. Also a lot of overheads between exposures.

 

If it would allow to double or triple the full well, while still maintaing a good sampling, it would be great.

 

Thanks for your contribution,

Stevan Klaas

 

Charge binning is when the signal from several pixels, in it's original and most basic form of a collection of electrons held in a charge potential well (the pixel), is combined before anything else is done to that signal. For a signal to be converted from charge, into a digital format we can process on a computer, it must be converted a couple of times. These conversions introduce noise, and other processes of moving the signal out of the pixel, amplifying it, and converting it again to digital, introduce more noise.

 

Most binning that occurs with CCD sensors is charge binning, the combination of collections of electrons. Most "binning" that occurs with most CMOS sensors these days is done digitally, after the analog signal is converted to digital...we just sum or average the numbers, but then we don't get any benefit on the read noise front.

 

So, FD binning in a CMOS sensor would bin, combine charge from multiple pixels, at the earliest possible convenience...in the pixels, while the charge is still charge. The charge in the FD is then converted to a voltage (very small amount of noise introduced here), which is applied to an amplifier (small to moderate amount of noise added here, amplified along with the charge signal), and the amplified voltage is then applied to the ADC unit (moderate to high amount of read noise added here), which converts the voltage into a digital number (which introduces quantization error, also a form of noise). Since the charge is combined as early as possible, you only get one "hit" of read noise added to the whole combined charge of all four pixels...rather than one "hit" per pixel (which is what happens when digitally "binning").

 

VtPS5Po.gif

 

If you usually have say 3.5e- read noise added each time a pixel is read out. Digital binning would have SQRT(4*3.5^2) or 7e- read noise total in a pixel digitally "binned" 2x2. Charge binning, on the other hand, would just have 3.5e- read noise. Now, with read levels this low (or even much lower), the difference to SNR is not that great. Not as great as, say, if you had 8, 10, 15e- or more read noise (which some CCD cameras have). So the benefit of charge binning is not necessarily going to be as great with 2x2 FD binning in CMOS as it potentially can be with CCD. That said, if you are chasing faint signals, especially under dark skies, FD charge binning would be a bonus, and would help in scraping really faint signals out of the noise,



#18 james7ca

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Posted 08 December 2018 - 02:19 AM

Hi Jon,

 

What would be the effect on the full well of such a charge binning in the IMX342 ?

 

The CMOS have very shallow wells at higher gains, leading to shorter exposure, and consequently using a lot of disk space and processing power to treat the image. Also a lot of overheads between exposures.

 

If it would allow to double or triple the full well, while still maintaing a good sampling, it would be great.

 

Thanks for your contribution,

Stevan Klaas

Well, once a pixel is saturated it will remain saturated so any more photons that fall on that particular pixel will be lost (so to speak). This is the same thing that happens internally with the Sony IMX294 sensor, although the specifications for that sensor seem to just sum the individual well depths for each internal pixel and that gives this sensor a pretty high well depth of 63.7ke (but that's binned 2 x 2 and each internal pixel is probably still only about 15ke, like many other CMOS sensors).

 

Practically speaking this shouldn't make a great deal of difference (meaning that "on paper" and to some extent in practice the total well depth when summing all four pixels will be higher than for each individual pixel), but it's not the same as having a single, larger pixel with the same well depth (as the binned total).

 

So, if you bin a 2 x 2 array you could reach the following conditions where the saturated pixels are marked as "S" and the unsaturated with "U" (a photon hit in either of the "S" pixels is lost):

 

SU

US

 

Which is a different state (and potential a different result) when having a single larger pixel which could still be unsaturated and capable of recording addition photons (a photon hit anywhere in the larger area of "U" is still recorded):

 

U


Edited by james7ca, 08 December 2018 - 02:41 AM.

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#19 Stevan Klaas

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Posted 08 December 2018 - 02:37 AM

OK I see.

 

But then, do CCDs beneficiate from binning regarding saturation capacity ?

 

Thanks,

Stevan

Well, once a pixel is saturated it will remain saturated so any more photons that fall on that particular pixel will be lost (so to speak). This is the same thing that happens internally with the Sony IMX294 sensor, although the specifications for that sensor seem to just sum the individual well depths for each internal pixel and that gives this sensor a pretty high well depth of 63.7ke (but that's binned 2 x 2 and each internal pixel is probably still only about 15ke, like many other CMOS sensors).

 

Practically speaking this shouldn't make a great deal of difference, but it's not the same as having a single, larger pixel with the same well depth.



#20 james7ca

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Posted 08 December 2018 - 03:02 AM

OK I see.

 

But then, do CCDs beneficiate from binning regarding saturation capacity ?

 

Thanks,

Stevan

In terms of saturation they should behave the same. In any case, it's all a compromise since you are lowering the spacial resolution by binning.

 

This problem may eventually go away once we have fully digital detectors and they are working on such technology as we speak. Maybe in another decade or two, but it's interesting to note that something like the Quanta Image Sensor may have an effective well depth of 1e, but it's read out thousands of times per second and the pixels are VERY small.

 

Here is a link about this technology:  https://engineering....-camera-systems

 

And here is a link to a fairly recent talk on the Quanta Image Sensor (by one of the inventors of the original CMOS sensor):

 

 https://youtu.be/O3ZSoQgDrOM


Edited by james7ca, 08 December 2018 - 03:17 AM.

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#21 Stevan Klaas

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Posted 08 December 2018 - 03:19 AM

That’s a real breakthrough. Thanks for the hint.

 

Regarding binning CCDs, I thought that by some mechanism the full well could indeed be enhanced. This is the info I read that made me think that :

 

https://quantumimaging.com/binning/

 

At some point they write :

 

In some sensors, it is possible to bin pixels with, say 100,000 electron full well together in a 2×2 binning mode yielding a new full well capacity of 4×100,000 or 400,000 electrons. This higher full well can be very useful in applications which are photon shot noise limited due to high background illumination.

 

 

 

In terms of saturation they should behave the same. In any case, it's all a compromise since you are lowering the spacial resolution by binning.

 

This problem may eventually go away once we have fully digital detectors and they are working on such technology as we speak. Maybe in another decade or two, but it's interesting to note that something like the Quanta Image Sensor may have an effective well depth of 1e, but it's read out thousands of times per second and the pixels are VERY small.

 

Here is a link about this technology:  https://engineering....-camera-systems



#22 james7ca

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Posted 08 December 2018 - 03:35 AM

That’s a real breakthrough. Thanks for the hint.

 

Regarding binning CCDs, I thought that by some mechanism the full well could indeed be enhanced. This is the info I read that made me think that :

 

https://quantumimaging.com/binning/

 

At some point they write :

 

In some sensors, it is possible to bin pixels with, say 100,000 electron full well together in a 2×2 binning mode yielding a new full well capacity of 4×100,000 or 400,000 electrons. This higher full well can be very useful in applications which are photon shot noise limited due to high background illumination.

Okay, but I think that is basically what I said above about the IMX294 sensor, internally they bin four pixels that each have a full well depth of about 15Ke and then specify that as a well depth of 63.7ke (since 4 x 15k = 60ke). However, that total well depth isn't distributed uniformly over the entire area of the binned pixels (at least not in the same way as if you had a single, larger pixel with a well depth of 63.7ke).

 

Will that make a difference? Probably not much and then only in areas that have significant differences in the photon density that exist on the scale of each of the smaller pixels that have been binned. See my diagram in post #18 (the "U" and "S" pixels).

 

In any case, this is straying perhaps from the OPs topic, which is the IMX342.



#23 Stevan Klaas

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Posted 08 December 2018 - 03:57 AM

Sorry for my digression on full well. I was evaluating switching from my ASI183 to a chip with potentially more full well (IMX342), so that I could have twice or three times longer exposures without saturating stars, and also improving SNR, while keeping a 2 to 3x sampling of the seeing.

 

Thank you very much for your explanations,

Stevan

 

 

Okay, but I think that is basically what I said above about the IMX294 sensor, internally they bin four pixels that each have a full well depth of about 15Ke and then specify that as a well depth of 63.7ke (since 4 x 15k = 60ke). However, that total well depth isn't distributed uniformly over the entire area of the binned pixels (at least not in the same way as if you had a single, larger pixel with a well depth of 63.7ke).

 

Will that make a difference? Probably not much and then only in areas that have significant differences in the photon density that exist on the scale of each of the smaller pixels that have been binned. See my diagram in post #18 (the "U" and "S" pixels).

 

In any case, this is straying perhaps from the OPs topic, which is the IMX342.



#24 ccs_hello

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Posted 08 December 2018 - 11:37 AM

re: Quanta Image Sensor (QIS) or photon-counting or SPAD

 

https://www.cloudyni...ng-image-array/

https://www.cloudyni...ow-light-astro/

 

really OT from this thread point of view...



#25 ccs_hello

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Posted 08 December 2018 - 11:50 AM

CCD, when doing charge-domain binning, is using a non-sensel, separate charge storage area (typically bucket transfer shift register) to get charges from different pixels accumulated.

In IMX342 case, these four (2x2) pixels' FD (charge storage capacitors) are then linked thus "equalized" (becomes the average of these 4.)

 

In the case of CCD charge-domain binning, if the accumulating charge storage well is large enough,  then indeed FWC_under_the_binning_condition will be 4 times of each pixel's FWC (** note not always implemented that way, but let's stay in that ideal case for now.)

Also note, each pixel's FWC will still have play here.  That is, if a pixel reached its FWC during the exposure time, it will not go higher independent of final accumulated, binnned FWC is going to be.

 

In the case of IMX342, as JamesCA had stated, if any of the pixel is already saturated during the exposure time, that pixel's charge will stay at 100% no matter what.

 

Hope I don't confuse you than what it meant to be.

(May be a long sentence would help: pixel FWC is still a limiting factor on FWC; in binning operation, CCD type may overflow because it's addition, while CMOS type is not because it's averaging.)


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